1. Field
Exemplary embodiments of the present invention relate to a semiconductor fabricating process, and more particularly, to a conductive structure including a silicon-containing layer and a metal-containing layer.
2. Description of the Related Art
Recently, semiconductor memory devices such as DRAM are operating at a high-speed. Therefore, a low-resistance material is used as the material of a gate electrode or a bit line. For example, when a metal-containing layer is formed as the material of the gate electrode or the bit line, it may be possible to implement a structure favorable to a high-speed operation. The metal-containing layer may include a stacked layer of two or more selected from titanium nitride (TIN), tungsten (W), tungsten nitride (WN), tungsten silicon nitride (WSiN), and tungsten silicide (WSix). Among the materials, TiN, WN, WSiN, or WSix may serve as a diffusion barrier. For example, when a polysilicon layer and a tungsten layer are stacked, TiN, WN, WSiN, or WSix may serve as a diffusion barrier between the polysilicon layer and the tungsten layer.
FIG. 1 is a diagram illustrating a gate structure formed by a conventional method.
Referring to FIG. 1, a gate dielectric layer 12 is formed over a semiconductor substrate 11. A silicon-containing layer 13 and a metal-containing layer are stacked over the gate dielectric layer 12. The metal-containing layer includes a diffusion barrier layer 14 and a metal layer 15.
A mask pattern 16 is formed over a metal layer 15, then by using the mask pattern 16 as an etch barrier, the metal-containing layer and the silicon-containing layer 13 are etched to form a gate structure.
In general, when the stacked structure of the silicon-containing layer 13 and the metal-containing layer is etched, a dry etch process such as reactive ion etching (RIE) is used. During the dry etch process, anisotropic etching must be performed for different kinds of materials.
During the etch process for the metal-containing layer, however, an undercut 17 may occur at the interface between the silicon-containing layer 13 and the metal-containing layer, because the silicon-containing layer 13 is more quickly etched. The undercut 17 occurs when the upper part of the silicon-containing layer 13 is etched. When the size of the undercut 17 further increases, the upper part of the silicon-containing layer 13 may be completely cut. Furthermore, when the undercut is severe, a part of the metal-containing layer may be lost (refer to reference numeral 18).